Dolev 4press - Troubleshooting & Diagnostics
The Test Tree - HOMC

HOMC

Check the HOMC Board (Standalone)

Card Ack.

Checks all HOMC Board Pc I/O address range (300H-30AH):
When this test fails, all HOMC tests below do not execute in the batch.

XILINX - Load

Loads HOMC.XIL file from the current directory to Xilinx.

Verify

Compares Xilinx data to the file data.
Uses the following files:
HOMC.XIL, 2018MASK.XIL 3030MASK.XIL

Once Mode

Checks HOMC Once Mode:
1)    Activate BUS_HOST to '1'.
2)    Disable 196 by creating pulse on DISABLE_196.
3)    Check that DIS_READY is at '0'.
4)    Activate BUS_HOST to '0'.

Status Buf.

Checks the Status Buffer:
1)     Activate BUS_HOST to '0'.
2)     Activate LOAD_CNT to '1'.
3)    Write to 302H, FC12H.
4)     Activate LOAD_CNT to '0'.
5)    Write to 300H, pattern.
6)     Activate READ_STAT2 to '1'.
7)     Read from 302H and compare to pattern.
8)     Repeat (1) - (7) for different patterns.

Message Buf.

Checks the Message Buffer:
1)    PC data bus -> HOMC data bus
2)     HOMC data bus -> PC data bus

Addr Counter

Checks Address Counter.
1)    Writing walking '1' data.
2)     Writing walking '0' data.

Addr Decoder

Checks Address Decoder.
1)    Activate SEL_RAMH to '0'.
2)     Check WCS RAM Address range (0-FC00H).
3)     Activate SEL_RAMH to '1'.
4)     Check DATA RAM Address range (8000H-FC00H).
5)     Check HOMC I/O Address range (FC00H-FC0AH).
    Address FC04H is not included.

RAM - Data Bus

Checks RAM Data Bus.
1)     Clear address counter.
2)     Write pattern of data to address=0.
3)     Clear address counter.
4)     Read back and compare those data.

Address Bus

Checks RAM Address Bus for stacked or shorted bits.

U605

Checks U605 Code+Data. Adress: 0-FC00H even. Data: 8 bit LSB

Ramp

Checks RAM by writing Ramp (address = data).

Random

Checks RAM by writing Random data.

U606

Checks U606 Code+Data. Adress: 1-8000H odd. Data: 8 bit MSB

U607

Checks U607 Data. Adress: 8000H-FC00H even. Data: 8 bit LSB

Bytes I/O

Checks RAM During Write/Read by Bytes only.

Load&Verify

Loads and Verifies Wcs RAM:
1)     Load OMC.WCS file from the current directory to WCS RAM.
2)     Compare WCS data to the file data.

Check by 196

Checks WCS RAM by 196 Fast Access:
1)     Write to Message Buffer (FC06H) data = 1155H.
2)     Load special small OMC_MEM.WCS file to WCS RAM.
3)     Verify WCS data to the file data.
4)     Activate Fast Reset on 196 for test running.
5)     Check WCS RAM using Ramp algorithm (start address 2200H).
6)     Delay 1 second for test completion.
7)     Read and Analyze Message Buffer:
    2000H - Test was not completed.
    1234H - Test completed OK.
    xxxxH - The first bad address returned.

Verif by 196

Micro (196) Compares WCS data to OMC.WCS file data.
Verify process is the same like from Pc, described before.
Because of each reading from the WCS is the opcode, the test takes too
much time (50 sec.), so this test is not included in the short batch.
Fail on this test means that there was illegal writing to the WCS Code
area, so after the fail WCS is being reloaded automatically
and the next test execution might complete with Pass.

Com3 Host A

Checks the serial RS232 port COM3 on HOMC
1)     Write to POST (Pc) that COM3 is detected.
2)     Enable COM3 serial port on HOMC - wr_iob(FC0EH, 1H).
3)     Check Default serial port registers values.
4)     Enable Internal Transmit/Receive loopback.
5)    Write to TRX buffer and compare to RCX buffer.
6)     Write to RCX buffer and compare to TRX buffer.
7)     Disable Internal Transmit/Receive loopback.
8)     Disable COM3 serial port on HOMC - wr_iob(FC0EH, 0H).

Com4 Host B

Checks the serial RS232 port COM4 on HOMC
1)     Write to POST (Pc) that COM4 is detected.
2)    Enable COM4 serial port on HOMC - wr_iob(FC0EH, 2H).
3)     Check Default serial port registers values.
4)     Enable Internal Transmit/Receive loopback.
5)     Write to TRX buffer and compare to RCX buffer.
6)    Write to RCX buffer and compare to TRX buffer.
7)    Disable Internal Transmit/Receive loopback.
8)    Disable COM4 serial port on HOMC - wr_iob(FC0EH, 0H).

Pc <-> 196

Checks communication between PC and 196 microcontroller on HOMC,
using the opcode algorithm which transfers parameters from Pc to Micro, and receives returned words form Micro to Pc.

HOMC Voltage

Checks the ability of the HOMC board to measure analog voltages.
1)    Check for analog GND to be near zero.
2)     Check for +5v power supply in range.

Laser Value

Checks Laser values by writing data to the DAC
1)     Set DAC from 1 to 1020 (PWM=167).
2)    Measure Laser voltage from the HOMC.
3)     Analyze received voltages, by linear regression for gain, offset and correlation problems.

Knee Value

Checks Knee value by writing data to the DAC
1)     Set DAC from 0 to 255.
2)     Measure Laser voltage from the HOMC.
3)    Analyze received voltages, by linear regression for gain, offset and correlation problems.

Clocks

All frequencies are measured through 196 HSI port.

18 Mhz

Checks 18432 Khz clock on the HOMC Board.

Sim. Expose

Checks Simulated Expose clock.
1)     Set SEL_SIM = 1 ; HOMC_wr_196( FC1AH, bit 15 = 1).
2)     Measure Simulated Expose clock [Hz] = 12000, Delta = 1.
3)     Set SEL_SIM = 0 ; HOMC_wr_196( FC1AH, bit 15 = 0).

StartupCheck

Perform Power Up (Start Up) test.
1)     Reset 196 and activate Power Up test.
2)     Analyze the only internal HOMC errors.

196 Wait St.

Checks the Wait State working from Micro (196):
1)     For the same time period read from specified address and return number             of reading loops.
2)     Perform (1) for the address = FC00H (Wait State Enable).
3)    Perform (1) for the address = F000H (Wait State Disable).
4)     Compare number of loops (2) versus (3).

CRC Chip

Checks the CRC Chip on HOMC:
1)    Reset the chip, Set and Reset again and Verify correct status.
2)     Shifts different patterns and readback the signature.

I2C Chip

Checks the I2C Chip on HOMC:
1)     Reset I2C by pulse on FE20H, bit 4.
2)     Write patterns to I2C base address.
3)     Readback those patterns with mask = 7FH (MSB is not activated).
4)    Enter and Verify Chip in Clock Mode.
5)     Enter and Verify Chip in Normal Mode.
6)     Enable I2C Chip Interrupt and check that:
        12C Chip responds to the Interrupt.
        Bus was released.
        Data was sent out from I2C.