Home | Contact Us | Submit Troubleshooting Info | Search | Help


    Output | Software Solutions | Proofing | Color, Screening and Calibration | Scanning | Digital Photography | Consumables | POS


Thermal 3 Errorcode: [01205] FPGA programing: Timeout on PLL lock status after reset

Error details

Thermal3 Errorcode: [01205] FPGA programing: Timeout on PLL lock status after reset
Thermal3 Errorcode
[01205] FPGA programing: Timeout on PLL lock status after reset

Service Information This is an error which could occur during initialization when the FPGA is programmed. It indicates a time out waiting on the 'DLL lock status after a system reset. It is probably due to a main head controller electronics board hardware problem.

Operator Action Call service.

Causes
  • Hardware error detected while programming FPGA chip

Applies to: THERMAL3
Modified: Wed Jul 16 04:28:31 2008
Updated: Wed Jul 16 04:52:18 2008
Module: HDW

    Copyright © 2005 Creo Inc. All rights reserved. Confidential. Back to top.